Saurabh Anmadwar

About Saurabh Anmadwar

Currently working on High-Speed Mixed-Signal PHY Design1. Have worked on complete CDR loop, squelch- & -LFPS detector design for PCI-e(gen-4)/USB3x/UFS and post-silicon characterizing/debug of these blocks in clock-embedded SERDES receiver. Also, have conceptual understanding of existing receiver architecture including different blocks in Rx current phase interpolators, duty-cycle corrector, DFE. Have owned Digital Ring-Oscilators, Strong-Arm Latch, and 8GHz Digital-Controlled Oscillator, lane-bias designs and worked on multiple aggressive technology nodes. Also, carried out receiver\'s functional level spectre simulation (using layout extraction of critical nets). Also, worked on CTLE (datalane+clklane) and important blocks of clk path (like IQ Generators, PI) in Source-synchronous DPHY architectures. Also, designed circuits like Gyrator based ICO, Constant Gm biases, voltage doubler chargepump.3. Built end-to-end-models for couple of High/Medium Speed Rx architectures for clock forwarding SERDES and have fair understanding of link budgeting. Undergone a basic Matlab/Simulink modelling certified course by Mathwork. Also, performed system simulation of existing receiver model. Also, have done hands-on matlab+spectre cosimulations. Previously worked on adaptive FFE based CTLE for a 25GBaud/s BiCMOS design as part of M.Tech dissertation, IIT Bombay and charge-pumps for 60GHz PLL. I have good fundamental knowledge in RF design and experience in onboard PLL design, used to build and test tunable complex signal RF transmitter PCB as research asst. at IIT Bombay.

Experience

1. Senior Staff Engineer

   Marvell Technology

   Aug 2024 — Present · Bengaluru, IN

Education

• Indian Institute of Technology, Bombay

  Master's Degree, Analog/RF Circuit and Systems

  2013 — 2016

• Visvesvaraya National Institute of Technology

  Bachelor of Technology (B.Tech.), Electrical, Electronics and Communications Engineering

  2009 — 2013

• Dilasagram Convent High School

  High School

  1994 — 2007

• Dr. Ambedkar College, Nagpur

  High School, Science (Electronics)

  2007 — 2009

Skills

• Hspice
• C
• Programming
• Io Design
• Analog Circuit Design
• Bicmos
• C++
• Equalization
• Verilog
• Pspice
• Html 5
• Bandgap References
• Cadence Spectre
• Vlsi
• Cadence Virtuoso Layout Editor
• Comsol Multiphysics
• Agilent Ads
• Matlab
• Serdes
• Very-Large-Scale Integration (Vlsi)
• Simulink
• Comparators
• Vhdl
• Simulations
• Algorithms
• High Speed Interfaces
• Software Development
• Linux
• Virtuoso