Saurabh Shandilya
Software Architect @Cadence
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WORK HISTORY
Software Architect @Cadence
EDUCATION
Indian Institute of Technology, Bombay
M.Tech., Instrumentation & Control
Guru Ghasidas University
B.E. Hons, Electrical Engineering
SKILLS
ABOUT SAURABH SHANDILYA
I specialize in building efficient AI software stacks for Vision and AI accelerators, with a background in computer vision, signal processing, quantization, compression and optimization.At Cadence, I am leading the development of AI/ML compiler components, enabling high-performance deployment of vision, image, audio, and language models (including LLMs) on Cadence’s AI accelerator IP. My work spans: • Graph import and IR Design and conversion • High-level graph optimizations • Quantization and precision-aware execution • Support for multiple accelerator configurations and model types • Expanding coverage of operators from major ML frameworks • Driving software architecture, algorithms, development workflows, and mentoring With over a decade of experience across embedded systems, DSP, and video compression (H.264, etc.), I bring a systems-level perspective to ML compiler development. I believe in being hands in and have been deeply involved in the full development lifecycle—from requirements gathering and algorithm design to architecture, implementation, and performance optimization.I collaborate closely with library teams, hardware architects, application engineers, and product teams to co-design solutions that strike the right balance between model accuracy, compiler flexibility, and hardware efficiency—Specialities—AI/ML Compiler Design · Neural Network Graph Optimization (GLOW, TVM, etc.)Quantization · Intermediate Representation (IR) Design Computer Vision · Video/Audio Compression (H.264, etc.)C/C++/Python Programming · Embedded System Development · DSP & Instruction Architecture Design
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