Satyanarayana A.

SOC Design Engineer at Intel Corporation

Role
Soc Design Engineer at Intel
Location
Bengaluru, IN
LinkedIn followers
500 followers

About Satyanarayana A.

11+yrs Experience in physical design domain and experienced with intel18A, 3nm, 10++…

Experience

  1. Soc Design Engineer

    Intel

    Jun 2018 — Present · Bengaluru, IN

    Responsible for Block level physical design implementation from RTL to GDSII. currently working Low-Power design block.

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Satyanarayana A. — Soc Design Engineer at Intel in Bengaluru, IN | Unifers