Satish Nayak

SOC logic design engineer at Intel Corporation

Role
Soc Logic Design Engineer at Intel
Location
Mangaluru, KA, IN
LinkedIn followers
500 followers

About Satish Nayak

VLSI engineer looking for dft design teams

Experience

  1. Soc Logic Design Engineer

    Intel

    Nov 2025 — Present · Bengaluru, IN

Education

  • Manipal Academy of Higher Education

    Master of Engineering - MEng, VLSI design

    2020 — 2022

  • Cascia high school

    High school

    2009 — 2012

  • Alva's Institute of Engineering and Technology

    Bachelor of Engineering (BE), Electronics and Communications Engineering

    2014 — 2018

  • St. Aloysius (Deemed to be University)

    pre-university(PCMCs)

    2012 — 2014

Skills

  • Communication
  • Management
  • Leadership
  • Microsoft Excel
  • Iot
  • C
  • Microsoft Office
  • Cricket
  • Verilog
  • Matlab
  • Microsoft Word
  • Raspberry Pi
  • Microsoft Powerpoint
  • Engineering
  • Microprocessors
  • Vhdl
  • Organizing
  • Music Lover
  • Mathematics
  • Umpire
  • Microcontrollers
  • 8051 Microcontroller

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Satish Nayak — Soc Logic Design Engineer at Intel in Mangaluru, KA, IN | Unifers