Sarvesh Verma
Director (APAC region) - Custom Silicon & ASIC Development at AMD, A Keen Learner & Passionate Engineer, Senior member IEEE, AMD Brand Ambassador
- Role
- Silicon Design Director at AMD
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Silicon Design Director
Sep 2023 — Present · Bengaluru, IN
Education
Guru Jambheshwar University
BE, ECE
Birla Institute of Technology and Science, Pilani
ME, EC
1999 — 2000
Skills
- Tcl
- Cadence
- Soc
- Physical Design
- Rtl Coding
- Formal Verification
- Vlsi
- Low-Power Design
- Arm
- Place & Route
- Asic
- Timing
- Rtl Design
- Processors
- Cmos
- Verilog
- Ncsim
- Primetime
- Dft
- Semiconductors
- Logic Synthesis
- Timing Closure
- Logic Design
- Integrated Circuit Design
- Vhdl
- Static Timing Analysis
- Eda
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