Sarvesh Miyan

Technical Director, Applications & System Engineering

Role
Technical Director, Systems & Applications Engineering at NXP Semiconductors
Location
San Jose, CA, US
LinkedIn followers
500 followers
Information TechnologyView LinkedIn profile

About Sarvesh Miyan

Hands-on, creative and result-oriented Engineering Leader with MS (Electrical Engineering), CLAD(Certified Labview Associate Developer), Certificate in Business Administration from UCSC-extension, Lean 6-sigma Green Belt from Purdue and over 20 years of experience working in Semiconductor Products/Processes while demonstrating consistent achievement of organizational objectives and goals. As a Director of Silicon Validation team in Maxim Integrated, I manage on-time completion of New Product Bench correlation and characterization, which includes resource allocation, project scheduling, architecting/supervising hardware and software development. During my tenure in Maxim, I took on responsibilities beyond my immediate job duties of New Product Introduction & Product sustenance activities and have contributed significantly to growth of product line by managing cost reduction goals, support product transfer to low defect process, customer issue resolution and tools development for business analysis/product promotion. My achievements in Maxim Integrated include new Validation Engineering(Post-Si char) group and functionality bring up from scratch. Authored Corporate Roles & Responsibility guide for validation functionality, established process and standard platforms. One of the early implementer of bench automation in Bay Area semi companies and thus reduce cycle time. Gross Margin expansion of 1%/2% in 2010/11 through Cost Reduction Projects, successful release of Product Selection (Visual C# Access DB) Tool to FAE and Sales team & release of Price/Market/Forecast Analysis (Excel VBA) Tools for internal Business team/Director.

Experience

  1. Technical Director, Systems & Applications Engineering

    NXP Semiconductors

    Jun 2021 — Present · San Jose, CA, US

Education

  • Centre for Development of Advanced Computing (C-DAC)

    6 months Diploma, Digital VLSI

  • Purdue University

    Green Belt, 6 sigma

    2011 — 2011

  • San José State University

    MSEE, Analog Mix Signal IC Design

    2003 — 2005

  • Kanpur University, India

    B.Tech, Electronics and Communications

  • UCSC Silicon Valley Extension

    Certificate, Business Management

    2010 — 2012

Skills

  • Application-Specific Integrated Circuits (Asic)
  • Spectrum Analyzer
  • Ni6548
  • Ic
  • Testing
  • Xilinx Ise
  • Pcb Design
  • Mixed Signal
  • Circuit Design
  • Function Generators
  • Ni6537
  • Asic
  • Labview
  • Analog Circuit Design
  • Adc, Dac, Filters, Opamp, Ref
  • Mso
  • Integrated Circuits (Ic)
  • Semiconductors
  • Engineering Management
  • Vhdl
  • Audio Precision 2700/ Psia
  • Dmm
  • Vba - Excel Macro Programming
  • Logic Analyzer
  • Matlab
  • Visual Studio
  • Vc++
  • Dg2020a
  • Test Engineering
  • Perl
  • Product Engineering
  • 6 Sigma Analysis

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