Saikat S.
ASIC Verification Engineer
- Role
- Pre-silicon Validation Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Saikat S.
Engineering professional with more than 15 years of experience in Embedded Systems and VLSI domain. Domain expertise on FPGA based design, IP integration, ASIC design porting to FPGA, Ethernet based peripheral design and verification etc.UVM, ALTERA, XILINX, Verilog, VHDL, SystemVerilog, FPGA, NC-SIM, Questa, ModelSim.Portable stimulus. Try -> Fail -> Iterate -> Succeed
Experience
Pre-silicon Validation Engineer
Jan 2022 — Present · Bengaluru, IN
Working on verification of cache coherency IP of Intel\'s data center SoCs. Using SV-UVM and static formal for bug hunting, Python for automation and productivity gains.
Education
MCKV Institute of Engineering
BE, ECE
2000 — 2004
Skills
- Arm
- Hardware
- Embedded Systems
- Xilinx
- Systemverilog
- Verilog
- Modelsim
- I2c
- Vhdl
- Quartus
- Soc
- Microcontrollers
- Fpga
- Asic
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