Saranya Lavu

Design for Test Engineer at Intel Corporation

Role
Dft Design Engineer at Intel
Location
Boston, MA, US
LinkedIn followers
500 followers

About Saranya Lavu

When I was a kid, I always liked problem solving and puzzles. Then, while pursuing my Bachelor degree in Electronics and Communication Engineering, I took some courses in VLSI Design and Computer Architecture. Once I had the opportunity to go deeper into the subject, I knew it was right for me. In pursuing a career as a Design Engineer, I gained extensive project experience during my MS in Electrical Engineering, learning about electronics and programming in the process. It gives me great satisfaction to create something that successfully solves a puzzle and provides a solution that physically does things. I\'ve gained experience in Design for Testability, Design Automation of VLSI Systems, Digital Logic Design, Design and Analysis of Reconfigurable Systems and Physical Design.I am focused on putting my passion and skills to good use. If you believe that I can help you, please get in touch or connect.

Experience

  1. Dft Design Engineer

    Intel

    Nov 2021 — Present · Boxborough, MA, US

Education

  • The University of Texas at Dallas

    Master's degree, Electrical engineering

    2017 — 2018

  • GITAM Deemed University

    Bachelor's degree, Electrical, Electronics and Communications Engineering

    2012 — 2016

Skills

  • C
  • Microsoft Excel
  • C++
  • Microsoft Office

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Saranya Lavu — Dft Design Engineer at Intel in Boston, MA, US | Unifers