Saransh Choudhary
Silicon Digital Design Engineer at Google
- Role
- Silicon Digital Design Engineer at Google
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Saransh Choudhary
Experience in RTL Design and FE Signoff for IPs and SoCs; additionally, with fundamental knowledge of Synthesis, LEC and STA• EDA tools : VCS/Verdi, Spyglass, VC Static, Design Compiler, Conformal and Primetime• Hardware description languages : Verilog, System Verilog• Scripting languages : Shell and Tcl
Experience
Silicon Digital Design Engineer
Oct 2024 — Present
Building servers of tomorrow at Google Cloud Silicon team.
Education
Siliguri Institute of Technology
Bachelor of Technology, Electronics and Communications Engineering
2014 — 2018
Birla Institute of Technology and Science, Pilani
Master of Technology, Microelectronics and VLSI Design
Skills
- Microsoft Word
- Electronics
- Team Leadership
- Communication Skills
- Java
- Very-Large-Scale Integration (Vlsi)
- Signal Processing
- Teaching
- C
- Communication Engineering
- Perl
- Semiconductors
- Matlab
- Poetry
- Mathematics
- Microsoft Publisher
- Research
- Article Writing
- Teamwork
- Team Management
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