Sarang Padalkar
ASIC Sherpa
- Role
- Chief Technology Officer at Eximietas Design
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
About Sarang Padalkar
Strong technical leader with a passion for building silicon based products. Hands-on experience in each phase of the silicon journey - micro-architecture, design, verification/emulation, physical implementation, silicon bring-up and customer support.Founding engineer/co-founder at several successful startups: microprocessor, media processor, AR/VR SOC, enterprise network/storage controller, telecom ASIC.Hands-on technical leadership of several SOC programs. Assembled, managed and mentored full design teams across geographies (US, India, Malaysia).Extensive experience licensing and integrating complex design IP from several key suppliers (ARM/RISC-V/Xtensa, high-speed Serdes (PCIe, Ethernet, HBM, DDR), and other mixed signal components.
Experience
Chief Technology Officer
Jan 2025 — Present · San Jose, CA, US
Education
Indian Institute of Technology, Madras
B.Tech
The University of Texas at Austin
M.S
Skills
- Microarchitecture
- Computer Architecture
- Asic Design Methodology
- Hardware Architecture
- Field-Programmable Gate Arrays (Fpga)
- Project Management
- Technical Leadership
- Functional Verification
- Software Development
- Python
- Silicon Debug
- Device Drivers
- Pcie
- Vlsi
- Systemverilog
- Debugging
- Microprocessors
- Team Management
- Arm
- Serdes
- Cross-Functional Team Leadership
- Perl
- Embedded Systems
- Eda
- Processors
- Static Timing Analysis
- Tcl
- Semiconductors
- Firmware
- Soc
- Rtl Design
- Fpga
- Asic
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