Sarang Bhaway

Advanced Packaging Integration Engineer at Intel Corporation

Role
Wafer Level Integration Engineer at Intel
Location
Hillsboro, OR, US
LinkedIn followers
500 followers

About Sarang Bhaway

Dedicated team player involved in high performing cross-functional teams Project…

Experience

  1. Wafer Level Integration Engineer

    Intel

    May 2023 — Present

Education

  • The University of Akron

    Doctor of Philosophy (Ph.D.), Polymer Engineering

    2011

  • Institute of Chemical Technology (formerly known as U.D.C.T.) Mumbai

    Bachelor of Technology (B.Tech.), Polymer Engineering Technology

    2007 — 2011

Skills

  • Tem
  • Afm
  • Research and Development (R&D)
  • Polymer Nanocomposites
  • Materials
  • Materials Science
  • Ftir
  • Dry Etch
  • Thin Films
  • Composites
  • Characterization
  • Structure-Property Relationships
  • Spectroscopy
  • Plasma Etch
  • Chemistry
  • Chemical Engineering
  • Coatings
  • Surface Chemistry
  • Polymers
  • Nanocomposites
  • Electrochemistry
  • Research
  • Nanotechnology
  • Polymer Engineering
  • Nanoparticles
  • Polymer Characterization
  • Polymer Physics
  • Powder X-Ray Diffraction
  • Ms Office
  • Tga
  • R&D
  • Block Copolymers
  • Polymer Science
  • Uv/Vis
  • Microsoft Office
  • Porous Materials
  • Sem
  • Polymer Chemistry

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Sarang Bhaway — Wafer Level Integration Engineer at Intel in Hillsboro, OR, US | Unifers