Santosh Kumar
SMTS - Functional Verification @ AMD
- Role
- Smts - Verification at AMD
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Santosh Kumar
Functional Verification Engineer (Pre-silicon validation engineer) with 12 years of experience worked at IP, ASIC and SoC level.Expertise in PCIe Gen6, NVMe.Part of Frontend datapath SoC verification of NVMe controller Verification of multiple in-house IPs at micron and ownership of a SubsystemExpertise in UVM, System Verilog and PERLExpertise in protocols USB2.0, AXI, AHB, APB and I2C protocols.Have working knowledge on basics of DDR and Ethernet MII interface which were learnt during the bring up of respective IPs at SoC levelFunctional Verification of CDPHY testchipSerdes PHY 25G, 16G pre-silicon validation
Experience
Smts - Verification
May 2025 — Present · Hyderabad, IN
Part of Xilinx-AECG group.Leading a team of six verification engineers responsible for verifying complex designs at both IP and subsystem levelsCollaborating across teams and taking ownership to ensure verification milestones for DFX are successfully achieved
Education
VEDA IIT
Master of Science (MS), VLSI
2012 — 2014
SLCS Institute Of Engineering And Technology
Bachelor of Technology (B.Tech.), Electrical, Electronics and Communications Engineering
2008 — 2012
SRM Junior College
Intermediate
2006 — 2008
Skills
- Amba Ahb
- Application-Specific Integrated Circuits (Asic)
- Soc
- Tcl
- Verilog
- Asic
- Microcontrollers
- Physical Design
- C++
- I2c
- Vhdl
- Very-Large-Scale Integration (Vlsi)
- Digital Electronics
- Vlsi
- System on a Chip (Soc)
- C
- Arm Architecture
- Systemverilog
- Universal Verification Methodology (Uvm)
- Uvm
- Functional Verification
- Pnr
- Perl Script
- Logic Design
- Arm
- Perl
- Rtl Design
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