Santosh Singh
Analog Validation Engineer || SerDes||HSIO Validation||PCIe
- Role
- Analog Validation Engineer (Phy Layer Electrical Validation) at Broadcom
- Location
- Bengaluru, IN
- LinkedIn followers
- 500 followers
About Santosh Singh
Anlog Characterization for SerDes IP || PMU Validation || HSIO || SerDes Power…
Experience
Analog Validation Engineer (Phy Layer Electrical Validation)
Jul 2023 — Present · IN
Bring up of Silicon & Analog Validation Platforms like Analog Board for new ASIC/SOC design.The PHY layer/Electrical Sub-block Validation (Post Silicon Validation) of SerDes IP to PCIe Electrical Compliance includes tests for TX Compliance, RX JTOL and Electrical Idle, DC Impedance of Transmitter and Receiver, and measurements of Return loss and Insertion loss of Transmitter and Receiver.PVT Analog Characterization for Transmitter, Receiver, PLL, DC and Return Loss of Analog IPs.Automating Tests in Python and Instruments using SCPI commandsHands on Experience in Test & Measurement Equipment’s used in Analog Validation (High Speed Real Time Oscilloscope, Power supplies like Agillent Supply and Measurement Equipment’s, SMU(Source Measure Unit), Network Analyzer, Spectrum Analyzer, JBERT High-Performance JBERT for Receiver Characterization, Sampling Scope etc.
Education
Nirma University, Ahmedabad, Gujarat, India
Master of Technology - MTech
2021 — 2023
IETE
Bachelor of Technology - BTech
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