Santosh Mardi

About Santosh Mardi

I have over 19+ years of experience leading and delivering multiple products across mobile, server data centers, IoT, and automotive domains. I have played architecture roles in various domains including power management, performance optimization, IP infrastructure, kernel schedulers, and device drivers. With extensive experience in driving technical discussions, I possess hands-on expertise in software design, implementation, and system-level analysis (focusing on power, performance, and multimedia aspects) for SoC IP and infrastructure.Currently, I work as a Silicon Architecture Engineer at Intel, where I lead all design efforts for Primecode (Firmware) deliverables on the Intel DMRD / PMR SoC (Data Center Chip). Primecode\'s primary focus is managing power and performance across the multi-die DMRD SoC.I have extensive knowledge of the Tensilica microcontroller used in the Primecode firmware. I have implemented multiple algorithms in Primecode firmware and in the Android kernel (DVFS and scheduler) to effectively manage system power and performance. This includes handling clocks and voltages for Core, L1, L2, L3 caches, system cache, and DDR based on workload requirements.Power and performance management entails profiling the system at both the firmware and kernel levels to identify optimization gaps or possibilities. Based on these profiling efforts, I have implemented numerous features that significantly improved power efficiency and performance across Qcom and Intel chiplets.I possess extensive knowledge of various Intel power management features, including ITD, SVID, telemetry, RAPL, Pkg C2 - C6, HPM, mesh programming, and MIO stacks. I have worked on GNR, GNRD, GRR, and DMRD data center SoCs.At Intel, I pioneered the integration of Accelerator chiplets into the DMRD Primecode via D2D(UCIe) interface, marking a first for the company, extensive knowledge D2D(UCIe) interface, training, configurations and handling the MB and SB traffic.I have also raised multiple Patents related to power and performance issues, resulted in 20% power saving from generation to generation of Qcom chiplets for memory-based workloads.Prior to joining Intel, I served as a Staff Engineer at Qualcomm, specializing in multimedia audio software, kernel programming, hardware bring-ups, and customer-specific hardware and software customization.Specialties: Primecode Firmware architect, CPU core system profiling, Multimedia Audio SW Specialist for Android, and Symbian OS right from middle wares, ALSA Framework, kernel drivers and hardware.

Experience

1. Silicon Power Management Architect

   Intel

   Feb 2022 — Present

   Currently Leading the primecode deliverables for PMR / DMRD data center silicon.Handling multiple power and performance flows for the atom cores, to get optimum perf per watt.

Education

• MET

  SSLC, Schooling

  1995 — 1999

• Visvesvaraya Technological University

  Bachelor's of Engineering, E & C E

  2001 — 2005

Skills

• Debugging
• Languages
• Firmware
• Device Drivers
• Spi
• Codecs
• Version Control Tools Clear Case, Clear Quest and Cvs, Perforce, Gerr-IT and Git
• Rtos
• Processors
• Alsa
• Kernel Drivers
• Android
• Clearcase
• I2c
• Open Os :- Linux and Android
• C++
• Kernel Debugging
• Embedded Systems
• C
• Soc
• Embedded Software
• Software Development
• Vxworks
• Kernel Programming
• Embedded Linux
• • Linux Device Driver Design and Implementation, Linux Bsp
• Symbian
• Dapm
• Usb
• Testing
• Android Multimedia
• Unix
• Digital Signal Processors
• Real-Time Operating Systems (Rtos)
• Dsp, Dma, Ssi Drivers and Slimbus Audio Codec Drivers
• Slimbus
• Jtag
• Embedded C
• Operating Systems
• • Debugging Tools : Trace32 Lauterbach Etm, Etb, Rvice, Nokia Carbide Profiler