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Santanu Bhattacharyya

Design Eng Director at Xilinx || Datacenter SmartNIC || Networking || 5G || FPGA || ASIC

Role
Design Eng Director at Xilinx
Location
South Delhi, DL, IN
LinkedIn followers
500 followers
EngineeringView LinkedIn profile

About Santanu Bhattacharyya

A highly versatile Senior Management Professional having rich experience in managing all aspects of VLSI Product Development, Communication system development and People Management. A proactive leader with a proven track record of developing multiple complex ASICs and multi-location team management in the areas of Telecom and Data Communications. Well versed with different telecom standard like PDH,SDH/Sonet, MEF-Ethernet Switch, PON & 3G/LTE backhaul and also gained proficiency in all the aspects of VLSI development process starting from architecture, design, verification, synthesis & ATPG.Possess good problem solving and analytical skills and talent for innovation, execution and negotiation. Make sound executive and cost conscious decisions. Adopt a motivational management style to create a work environment to enhance productivity with a record of building & retaining highly motivated team. Have outstanding process/methodology improvement and project management skills. An excellent balance of leadership, project execution skill and technical competence.Specialties: •ASIC Design/verification & Methodology,Communication system understanding-Ethernet switch/Transport & timing synchronization in packet switched network-1588 and VLSI product development•Building and handling of high performance teams, interface with customers, interface with multiple internal groups like SW, foundry engineering, package engineering, system validation, board design, documentation and multi-location project management (including external contractors)

Experience

  1. Design Eng Director

    Xilinx

    Aug 2019 — Present

Education

  • Jadavpur University

    M.TECH(Communication)

Skills

  • Project Management
  • Soc
  • Project Planning
  • Systemverilog
  • Vlsi
  • Formal Verification
  • System on a Chip (Soc)
  • Field-Programmable Gate Arrays (Fpga)
  • Uvm
  • Ic
  • Hardware
  • Telecommunications
  • Embedded Systems
  • Static Timing Analysis
  • Rtl Design
  • Rtl Verification
  • Amba Ahb
  • Debugging
  • Very-Large-Scale Integration (Vlsi)
  • Fpga
  • Verilog
  • Asic
  • Ethernet
  • Semiconductors
  • Logic Synthesis
  • Vmm
  • Mixed Signal
  • Verification
  • Timing

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