Sanket Patil

About Sanket Patil

My name is Sanket Patil, and I am actively seeking full-time opportunities in Design Verification. I recently completed my Master’s degree in Electrical and Computer Engineering at Portland State University (June 2024) with a GPA of 3.96.I also gained hands-on industry experience during my internship at AMD as a CPU Post-Silicon Validation Intern, where I focused on automation and validation processes.I have strong academic foundation in Computer Architecture, System Verilog, RTL Design and ASIC workflows, STA, as well as proficiency in Assertion-Based Verification, Formal Verification, and advanced methodologies like UVM and coding languages like SV, C/C++, Python.Courses: Microprocessor System Design, Computer Architecture, System Verilog, Pre-Silicon Verification, ASIC Modeling and Synthesis, Formal Verification, Computational ToolsTechnical Skills gained:Programming and Scripting languages: Verilog HDL, System Verilog, C/C++, UVM, Python, Linux, Assembly LanguageConcepts: RTL Design, Cache, Pipeline, Assertions, Constraints, Coverage, DFT, RISC-V, Formal Verification, Object Oriented Programming (OOPs), UVM, STA, Synthesis, ASIC, Microarchitecture, Debugging, Problem solvingComputer-based Tools: QuestaSim, ModelSIM, LtSpice, iVerilog, GTKWave, Quartus Altera, EDA, MATLABOperating Systems: Windows, LinuxLet\'s connect!Sanket P••••••••@pdx.edu

Experience

1. Gpu Formal Verification Engineer

   AMD

   Jun 2025 — Present · Orlando, FL, US

Education

• KJ Somaiya College of Engineering, Vidyavihar

  Bachelor of Technology - BTech, Electrical, Electronics and Communications Engineering

• Portland State University

  Master's degree, Electrical and Computer Engineering

• Chate Jr College of Science, Kolhapur

  HSC, Science