Sankara Narayanan
Chip Design and Verification | Director Engineering @ Capgemini
- Role
- Director - Engineering at Capgemini Engineering
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Sankara Narayanan
Techno-managerial Leadership in System-on-Chip, Verification, Front-end design. • 32…
Experience
Director - Engineering
Jul 2021 — Present · Bengaluru, IN
Techno-managerial leadership in projects involving SOC/IP front design and verification
Education
MHSS (Madras Hindu Seva Sangam) High School, Ambattur, Chennai.
SSLC, General Studies
1982 — 1987
Sri Venkateswara College of Engineering
B.E, Electronics & Communication Engineering
1989 — 1993
Sir Ramaswamy Mudaliar Higher Secondary School, Ambattur, Chennai
12th Std., Science group
1987 — 1989
Skills
- Asic
- Logic Synthesis
- Semiconductors
- Simulations
- Team Building
- Application-Specific Integrated Circuits (Asic)
- Static Timing Analysis
- Functional Verification
- Ic
- System on a Chip (Soc)
- Verilog
- Rtl Design
- Mentoring
- Integrated Circuits (Ic)
- Hardware
- Vlsi
- Soc
- Formal Verification
- Digital Signal Processors
- Systemverilog
- Very-Large-Scale Integration (Vlsi)
- Dft
- Project Management
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.