Sanjay Kumar M
RTL Design and Verification Engineer| seeking job opportunities in semiconductor |VLSI | Enthusiasts | Digital electronics| Verilog | System verilog | UVM | STA
- Role
- Trainee at Maven Silicon
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Sanjay Kumar M
This digital world is a testimony of the contribution of VLSI industry. I would like to contribute to this industry with my acquired skill set and knowledge till now. Aiming to excel in Design and Verification.>>Skills I know:• Verilog• System Verilog• Universal Verification Methodology (Uvm)• RTL Coding• Functional Verification>>Hands-on Experience:• Router 1x3 Design using Verilog Verification using UVM>>Behavioral Skills:• Communication skills• collaborative• Organized>>Area of Interests• ASIC Verification• SOC Verification• RTL Design
Experience
Trainee
Sep 2022 — Present · IN
Education
C Byregowda Institute Of Technology, Kolar
Bachelor of Engineering - BE
2019 — 2023
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