Sandeep Reddy Kunduru
- Role
- Design Engineer at Xilinx
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
About Sandeep Reddy Kunduru
QUALIFICATIONS: Exposure to logic design (RTL coding, logic data path, combinational…
Experience
Design Engineer
Apr 2016 — Present
Work with the CAD team to evaluate new tool features that will help layout projects. Collaborate on custom layout and automatic place-and- route flow. Help address layout challenges associated with advanced technology nodes Work with scripting languages, ie, Perl/Python/Tcl.
Education
The University of Texas at Dallas
Master's Degree
2014 — 2015
GITAM University
Bachelor's Degree
2009 — 2013
Skills
- Html
- Digital Signal Processing
- Java
- Xilinx Ise
- Synopsys Tools
- Rtl Design
- Very-Large-Scale Integration (Vlsi)
- Cadence Schematic Capture
- Microsoft Office
- Vlsi Cad
- Matlab
- Concept Hdl
- Cadence Virtuoso Layout Editor
- C
- C++
- Simulations
- Embedded Systems
- Computer Architecture
- Cadence
- Vhdl
- Asic
- Linux
- Vlsi
- Perl
- Verilog
- Modelsim
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