Sandeep Janjirala

About Sandeep Janjirala

Good knowledge on Fundamental of Digital Electronics Concepts. Good Understanding and Programming Skills in Verilog & System Verilog. Hands on Experience with EDA tools NCSIM, Modelsim, questa. Speciality : Verilog, SystemVerilog. Languages : System Verilog, Verilog, C, OOPS Concepts Scripting languges : Shell,perl Software Tools : NCSim, Xilinx ISE, Modelsim,questa,Conformal tool Hands on experience in System Verilog Development of Testbench using Hardware Verification language.Hands on experience in developing of Testbench using UVM & Good Debugging skill.Logic Equivalence checking schematic vs verilog (LEC)Verification of DDR-Phy (DDR4/LPDDR4).Verification of DDR-Phy(DDR5/LPDDR5).VERIFICATION DDR5 CBT, PDA

Experience

1. Staff Engineer - Asic Design Verification

   Micron Technology

   Sep 2022 — Present · Bengaluru, IN

Education

• Jawaharlal Nehru Technological University-Hyderabad

  Bachelor of Technology (B.Tech), Electrical, Electronics and Communications Engineering

  2010 — 2014

Skills

• Verilog
• Digital Electronics
• Very-Large-Scale Integration (Vlsi)
• Front-End Design
• Vlsi
• Spi
• Shell Scripting
• Xilinx Ise
• Ncsim
• Matlab
• Perl
• Eda
• Modelsim
• Integrated Circuit Design
• C++
• Uvm
• C
• Programming
• Vhdl
• Fpga
• Asic
• Rtl Design
• Systemverilog
• Electronics
• Functional Verification