Sandeep Aggarwal

About Sandeep Aggarwal

23 years of industry experience in complete ASIC implementation with hands on experience in front end design- Led multiple SOCs at Qualcomm in state of the art tech nodes with some going to production with first silicon revision- Worked on four generations of TI OMAP family SOCs. Successfully led OMAP3/OMAP4 SOC execution with brand new architecture and latest power management techniques of that time- Experience in setting up a successful team from ground up with a mix of fresh and experience engineers.Specialties- Low power SOC Design expert: Hands on experience of full chip Low Power design definition, micro-architecture, implementation all the way to silicon RAMP of TI\'s OMAP3 and OMAP4 product lines- Multi million gates SOC development management for cutting edge technologies.

Experience

1. Sr Dir Engineering

   Qualcomm

   Feb 2020 — Present · Bangalore, IN

   Leading CPU organisation at Qualcomm India responsible for delivering latest CPU cores at cutting edge tech nodes.

Education

• CR State College of engg. Murthal India

  Becholer of Engineering, Electronics and Communications

  1991 — 1995

• Indian Institute of Technology, Bombay

  Masters of Technology(M. Tech), Micro Electronics

  1995 — 1997

Skills

• Rtl Design
• Asic
• Soc
• Processors
• Lna
• Logic Analyzer
• Xilinx Ise
• Product Engineering
• Low-Power Design
• Microarchitecture
• Physical Design
• Ic
• Timing Closure
• Silicon
• Power Management
• Debugging
• Vlsi
• Semiconductors
• Verilog
• System on a Chip (Soc)
• Application-Specific Integrated Circuits (Asic)