Sanam Kala
ASIC Digital Design
- Role
- Staff Engineer at 新思科技股份有限公司
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Sanam Kala
RTL Design Engineer with 4+ years of experience in digital design, SoC integration, and low-power methodologies. Strong expertise in Verilog/SystemVerilog RTL development, micro-architecture implementation, and front-end signoff, including Lint, CDC, synthesis, STA, and DFT.Hands-on experience with ARM AMBA protocols (AXI, AHB, APB) and PCIe Gen5, including IP integration, clock/reset design, timing constraints, and SRAM/standard-cell integration. Proven track record of delivering production-ready IPs and collaborating across design and implementation teams.Passionate about clean RTL, protocol-correct design, and scalable SoC architectures.
Experience
Staff Engineer
Mar 2026 — Present · Noida, IN
Education
Indian Institute of Technology (Indian School of Mines), Dhanbad
Master of Technology, Electronics and Communication Engineering (VLSI)
2016 — 2018
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