Sampath Kumar Polishetty
DDR verification engineer
- Role
- Ddr Verification Engineer at Microsoft
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Sampath Kumar Polishetty
12 plus years of experience in ASIC functional verification both at IP and SOC.Hands on Verification on Ethernet switch,filters(xl\'s and gyros), sensors,Spi,sdio,emmc,sdcc controller,SD card,I3c,ufs controller,spmi,qpic,qspi,q2spiBus protocols axi,ahb.Experience in developing test benches in UVM and system verilog from scratch and and outlining test, coverage plans and gate sim.
Experience
Ddr Verification Engineer
May 2024 — Present · Bengaluru, IN
Education
Jntu
Bachelor's degree, ECE
Skills
- Soc
- C
- Vlsi
- Systemverilog
- System Verilog
- System on a Chip (Soc)
- Universal Verification Methodology (Uvm)
- Application-Specific Integrated Circuits (Asic)
- Soc Verification(Gatesim)
- Uvm
- Perl
- Perl Script
- Logic Design
- Rtl Design
- Functional Verification
- Debugging
- Very-Large-Scale Integration (Vlsi)
- Uvm Methodology
- Verilog
- Asic
- Semiconductors
- C++
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