Samiha Khair
Design implementation Engineer at Marvell Technology
- Role
- Design Implementation Engineer at Marvell Technology
- Location
- Santa Clara, CA, US
- LinkedIn followers
- 500 followers
About Samiha Khair
Static Timing Analysis, synthesis & optimization, power analysis & modeling with PTPX, Power Artist & HSPCIE, logic design in RTL• Design For Testability(DFT): Stuck-at scan, compression scan,At-speed scan, MBIST, Boundary scan etc.• Protocol Familiarity : ARM SOC Architecture, AMBA AHB Architecture, AMBA AXI Architecture. • Tools: VCS, Design compiler, DVE, Prime Time, DFT Compiler, Virtuoso, DFT Compiler, Conformal Equivalence Checker Formality, Tetramax, Spyglass, Tessent,TestKompress.
Experience
Design Implementation Engineer
Mar 2026 — Present
Education
San José State University
Master's degree, Electrical and Electronics Engineering
2009 — 2010
Skills
- Axi
- Perl
- Embedded Systems
- Semiconductors
- Debugging
- Integrated Circuits (Ic)
- Scan
- Soc
- Vlsi
- Jtag
- Logic Design
- Systemverilog
- Dft
- Ic
- Lec
- Logic Synthesis
- Fpga
- Integrated Circuit Design
- Asic
- Bist
- I2c
- Scan/Atpg
- Digital Signal Processors
- Amba Ahb
- Timing Closure
- Rtl Design
- C
- Application-Specific Integrated Circuits (Asic)
- Verilog
- Sta
- System Verilog
- System on a Chip (Soc)
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