Sakshi Sruthi Kotapathi

About Sakshi Sruthi Kotapathi

Motivated and detail-oriented VLSI RTL and design engineer with hands-on experience in digital electronics, RTL design, and verification methodologies. Recently completed advanced training at VLSI First Institute, gaining strong foundational and practical knowledge in Verilog, SystemVerilog, and UVM.Proficient in developing and verifying IP cores using industry-standard protocols, including: APB (Advanced Peripheral Bus) – designed and verified peripheral communication IP with a focus on low-power, low-bandwidth integration. 10G Ethernet MAC – worked on integrating a high-speed datapath core with Wishbone-compliant management, emphasizing small gate footprint and custom logic compatibility.Demonstrated ability to:Write efficient, reusable RTL and testbench codeExecute constrained-random and functional coverage-driven verificationCollaborate in project-based environments and deliver quality results under mentorshipActively seeking entry-level opportunities where I can contribute to real-world silicon design and verification teams while continuing to grow as a VLSI professional.

Experience

1. Printed Circuit Board Design Engineer

   Hbl Engineering Limited

   Jan 2026 — Present

Education

• Hyderabad institute of technology and management

  Bachelor of Technology - BTech, Student