Sakshar Pathak
Lead Analog Design Engineer at NXP Semiconductors | Ex- Silicon Labs | Ex- WDC | IIIT Delhi
- Role
- Lead Analog Design Engineer at NXP Semiconductors
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Sakshar Pathak
Power Management IC Design Engineer :• LDOs, DC-DC, BGR.• Worked on Technology nodes: 40nm,16nm,65nm,180nm.• Cadence Design Systems: Cadence Virtuoso, Calibre, ADE L, ADE XL, Maestro.• Hardware Description Language(HDL): Verilog.
Experience
Lead Analog Design Engineer
Apr 2025 — Present · Bengaluru, IN
Education
UIET Panjab University
Bachelor of Engineering (B.E.), Electronics and Communications Engineering
2012 — 2016
St.Thomas School
10, ICSE Board
IIIT DELHI
Master of Technology - MTech, VLSI
2017 — 2019
St.Thomas School
12, ISC Board
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