Saiteja Heerakari
CPU Performance architecture validation of SoC | Senior Silicon Design Engineer @ AMD
- Role
- Senior Silicon Design Engineer at AMD
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Saiteja Heerakari
AMD benefits from collaborative contributions as a Senior Silicon Design Engineer, leading efforts in SOC-level CPU architecture validation. With a Master\'s degree in VLSI from Osmania University, expertise spans CPU-to-memory data paths and architecture, ensuring successful design and validation outcomes. Previous roles, including Silicon Design Engineer II and Co-Op at AMD, reinforced skills in architecture, design engineering, and C programming. Dedicated to enabling innovative semiconductor solutions, work emphasizes precision and teamwork in delivering high-performance systems.
Experience
Senior Silicon Design Engineer
Nov 2021 — Present · Hyderabad, IN
Led a project team to initiate and execute comprehensive test plans ensuring thorough validation.Initiated the coverage of new design features while evaluating their performance impact.Executed high-level design reviews to assess design integrity and facilitate improvements.Evaluated the effectiveness of design changes and provided feedback for optimization.Optimized design validation processes to reduce overhead and improve workflow efficiency.Coordinated with cross-functional teams to align on project objectives and deliverables.Led the effort in documenting and analyzing the performance impacts of design revisions.Executed performance assessments to validate design improvements and expected outcomes.Mentored intern joinees on procedures and best practices to facilitate seamless integration.
Education
Osmania University
Master's degree, VLSI
2017 — 2019
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