Saiteja Appala
Teaching Assistant @BITS Pilani, Hyderabad Campus
Hyderabad, TG, IN
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WORK HISTORY
Aug 2024 — Present
Teaching Assistant @BITS Pilani, Hyderabad Campus
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Hyderabad, IN
EDUCATION
2020 — 2023
JNTUH College of Engineering Hyderabad
Bachelor of Technology - BTech
2024 — 2026
BITS Pilani, Hyderabad Campus
Master of Engineering - MEng
ABOUT SAITEJA APPALA
Aspiring VLSI Design Engineer | Passionate about Digital Design, CMOS, and Chip-Level Innovation I’m currently pursuing my journey in VLSI design with a strong foundation in digital electronics, CMOS circuits, Verilog HDL, and EDA tools like Cadence Virtuoso. My academic and hands-on experiences have deepened my interest in semiconductor physics, RTL design, timing analysis, and physical implementation.
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