Sai Swaroop Boodida
Design Verification Engineer | Sr Silicon Design Engineer @ AMD | VLSI Systems Design @ NITW
- Role
- Sr Silicon Design Engineer at AMD
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Sai Swaroop Boodida
Design Verification Engineer with 4 years of experience involved in the latest GDDR PHY verification, focusing on feature verification with coverage closure. This involves test development, DV checkers (SVA), and functional coverage. I have over three years of experience in this role, having previously worked as Analog Design Intern at Intel Corporation.I hold a Master of Technology in VLSI Systems Design from the National Institute of Technology WarangalMy skills include GDDR, SystemVerilog, UVM, Real Number Modelling(RNM), AMBA APB and AHB. I am passionate about advancing the field of silicon design verification and contributing to the development of innovative technologies.
Experience
Sr Silicon Design Engineer
Dec 2023 — Present · Bengaluru, IN
Working on latest GDDR PHY verification, focusing on feature verification with coverage closure which includes test development, DV checkers (SVA), and functional coverage.
Education
National Institute of Technology Warangal
Master of Technology - MTech, VLSI Systems Design
2019 — 2021
RAJIV GANDHI UNIVERSITY OF KNOWLEDGE TECHNOLOGIES, NUZVID
Bachelor of Technology - BTech, Electrical, Electronics and Communications Engineering
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