Sai Sriram Adabala
Senior System Test Engineer at Bosch | Hardware in Loop | Software in Loop | dSPACE | Vector |
- Role
- Senior Software Engineer at Bosch Global Software Technologies
- Location
- Coimbatore, IN
- LinkedIn followers
- 500 followers
About Sai Sriram Adabala
Experienced Software Test Engineer with a demonstrated history of working in the Automotive Steering domain. Skilled in Hardware in Loop and Software in Loop testing techniques, Systems Engineering methodology, Knowledge of DSpace and Vector tools, Component Integration Testing, source code management with Git, Requirement management in Rational DOORS and worked with Agile & V Methodologies. A strong engineering professional with a Bachelor of Engineering focused in Electronics and Communications Engineering. Area of Expertise: 1. Hardware in Loop (dSPACE PHS and SCALEXIO) 2. Software in Loop (FMU and dSPACE VEOS) 3. Bench Testing (Vector CAN Tools) 4. Systems Engineering (Test Engineer)
Experience
Senior Software Engineer
Bosch Global Software Technologies
Jan 2023 — Present · Coimbatore, IN
Validating System functions for Electric Power Steering ang Steering Rack Actuator systems.\\\\n• Commissioning the dSPACE - SCALEXIO HIL system as per the customer requirement and creating the Restbus simulation model using Matlab Simulink - dSPACE RTI blocks with respect to DBC, ARXML files.\\\\n• Development of automated tests in dSPACE as per platform standard (SysEng 2.0 methodology) and evaluating the steering system behavior and creating bugs in JIRA T&R.\\\\n• Supporting the OEM for test evaluation and providing the solutions required for validation in projects.\\\\n• Integrating Virtual Steering System HIL to validate system functions in dSPACE VEOS to offload the physical HIL systems.\\\\n• Requirement Engineering for system functions as per the Systems Engineering methodology followed in Robert Bosch AS.\\\\n• Implementing and evaluating HiL2SiL using VEOS in order to reduce the load on hardware systems as part of the cost cutting strategy.\\\\n• Validating function contributions (SW functions) in Software in Loop using FMU as part of Component Integration Testing.\\\\n• Validating few SW functions in test bench setup with Vector tools (Canoe, Canalyzer, Canape and CAPL scripting).\\\\n \\\\n\\\\n \\\\n \\\\n\\\\n \\\\n
Education
SRKR Engineering College
Bachelor of Engineering, Electronics and Communications Engineering
2015 — 2019
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.