Saikalash Shetty
Physical Design Implementation Engineer at Google
- Role
- Physical Design Implementation Engineer at Google
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Saikalash Shetty
As a dedicated Physical Design Implementation Engineer at Google with over four years of experience, I contribute to advanced projects in the semiconductor industry. My expertise spans leveraging tools like Cadence Innovus, Synopsys HSPICE, and Apache Redhawk to optimize complex physical design workflows. Equipped with an M.Tech. in Microelectronics from IIT Bombay, I have a solid foundation in VLSI and microelectronics, which supports my contributions to innovative technology solutions. At Google, I work on critical physical design implementation challenges, focusing on delivering robust, high-performance solutions. My previous roles at Synopsys and Samsung Electronics further honed my ability to collaborate with teams in deploying cutting-edge design automation tools and addressing unique challenges in semiconductor development. By aligning technical proficiency with a commitment to innovation, I aim to drive impactful outcomes in the tech ecosystem.
Experience
Physical Design Implementation Engineer
Oct 2021 — Present
Education
Bhartiya Vidya Bhavans Sardar Patel Institute of Technology Munshi Nagar Andheri Mumbai
Bachelor of Engineering, Electrical and Electronics Engineering
Indian Institute of Technology, Bombay
Master of Technology (M.Tech.), Microelectonics and VLSI
Skills
- C
- Vhdl
- Simulations
- Algorithms
- Synopsys Primetime
- Cadence Innovus
- Latex
- Linux
- Mentor Graphics Calibre
- Tcl
- Nanotechnology
- Cadence Virtuoso
- Apache Redhawk
- Verilog
- Characterization
- Synopsys Hspice
- C++
- Simulink
- Matlab
- Perl
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