Sai Rohith D S
Analog layout engineer at Texas Instruments
- Role
- Analog Layout Engineer at Texas Instruments
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Sai Rohith D S
Analog layout engineer at Texas instrumentsJoined as a NCG in 2023.• Deals with Layout designs of OTP, MTP, Fuse, EEPROM memory IP\'s and OTP, Fuse WLR\'s.• Also designs HVGENS for all the foundational IP\'s.• Proficient with Floor planning, accurate current mirror matching, accurate routes matching with desired capacitance, leaf and top-level layout designs, verification techniques (EMIR flow, Resmap and PGV).
Experience
Analog Layout Engineer
Aug 2023 — Present · Bengaluru, IN
Deals with Layout designs of OTP, MTP, Fuse, EEPROM memory IP\'s and OTP, Fuse WLR\'s.• Also designs HVGENS for all the foundational IP\'s.• Proficient with Floor planning, accurate current mirror matching, accurate routes matching with desired capacitance, leaf and top-level layout designs, verification techniques (EMIR flow).
Education
JSS SCIENCE AND TECHNOLOGY UNIVERSITY
Bachelor of engineering, Electrical, Electronics and Communications Engineering
Indian Institute of Technology, Madras
Master of Technology - MTech, Integrated Circuits and Systems
2028
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