Sai Palisetti
Design Verification Engineer | Onsemi | IIIT Bangalore
- Role
- Senior Design Verification Engineer at onsemi
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Sai Palisetti
Tech graduate in Electronics and Communication Engineering from BANGALORE. Eager to…
Experience
Senior Design Verification Engineer
Jun 2025 — Present · Bengaluru, IN
Education
International Institute of Information Technology Bangalore
Master of Technology - MTech
2019 — 2021
Rvr&Jc College of Engineering (Autonomous)
Bachelor of Technology - BTech
2013 — 2017
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