Sai Pawan
SMTS Silicon Design Engineer at AMD
- Role
- Smts Silicon Design Engineer at AMD
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Smts Silicon Design Engineer
Jun 2025 — Present · Hyderabad, IN
Education
Sreenidhi Institute of Science and Technology
Bachelor of Technology, Electronics
2005 — 2009
Skills
- Primetime
- Ir
- Floorplanning
- Tcl
- Static Timing Analysis
- Physical Design
- Vlsi
- Clock Tree Synthesis
- Timing Closure
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