Sai Krishna Saathvik Gaddipati

About Sai Krishna Saathvik Gaddipati

I am currently working as Full time employee in the field of ASIC Design & Verification. Currently I am working as a Design Verification Engineer at Amd. I have 4+ years of experience in the field of Design and Verification using System Verilog and UVM. Interests:IP VerificationRTL Front-end DesignEmulation based VerificationDesign Automation* Good understanding of VLSI concepts and VLSI Digital Design.* Proficient in building UVM based Verification environment for IP, SOC and Emulation based verification.* Familiarity in developing efficient verification test bench/test plan in Verilog HDL.* Conceptual understanding of ASIC design flow and tools, RTL design and synthesis, STA, DFT and Formal verification.* Conceptual understanding of EDA algorithms and their implementation.* Proficient in C, C++, and with scripting languages like Perl.Skills:• Verilog, System Verilog, System Verilog Assertions, Functional Coverage• Verification Methodologies: UVM, Coverage Driven Verification, Assertion Based Verification.• Programming Languages: C, C++.• EDA Tool: VCS, Questa Sim.• Protocols known: Ethernet(Current Project), XSPI, GDDR6 Memory Controller, AXI, APB, AHB

Experience

1. Sr Silicon Design Engineer

   AMD

   Oct 2021 — Present · Bangalore Urban, IN

Education

• Vignan's Institute of Information Technology, Beside VSEZ, Du

  Bachelor of Technology - BTech

  2013 — 2017