Sai Krishna
Analog Layout Engineer at Intel
- Role
- Senior Analog Layout Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Sai Krishna
8 Years of hands on Experience in Deep sub-micron Process Technologies(7nm, 5nm, 14nm, 18nm, 22nm, 28nm) in TSMC, Samsung and Intel.Worked on Layout for GPIO Cells, USB2, C2C, HSIO and Multi-protocol SERDES IPS.Worked on Layout for various critical Blocks like LDO, BGR, CTLE, Rx, Tx, Clocking Blocks and Resistor Calibration Blocks.Very Good at Understanding the Layout Multi-Stack Methodology and working on Migrating from one to other and vice-versa.
Experience
Senior Analog Layout Engineer
May 2022 — Present · Bengaluru, IN
Education
Anna University Chennai
B.E. from RMD Engineering College, Electronics and Communications Engineering
2012 — 2016
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