Sai Chandu K
CPU Design Verification Engineer at MIPS | BITS Pilani
- Role
- Senior Design Engineer, Cpu Dv Team at MIPS
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Sai Chandu K
Deeply fascinated by digital design and computer architecture. Eager to leverage my…
Experience
Senior Design Engineer, Cpu Dv Team
Aug 2025 — Present · Bengaluru, IN
Education
Birla Institute of Technology and Science, Pilani
M.Sc. with B.E (Dual Degree)
2019 — 2024
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