Sahanashree H N

GPU Logic Design Engineer

Role
Gpu Logic Design Engineer at 英特尔
Location
San Francisco, CA, US
LinkedIn followers
500 followers

About Sahanashree H N

I\'m a passionate and results driven individual. My journey has equipped with a deep understanding of RTL Design and Verification. Currently I\'m working as a DFT Design Engineer with a focus on ensuring the reliability and testability of Integrated Circuits. In my role, I specialize in the validation of Test Access Port(TAP) Controllers and Streaming Scan Networks(SSN). I\'m passionate about advancing my skills in the evolving field of DFT and continually seek out the new challenges that allow me to grow professionally. I look forward to connecting with fellow professionals, sharing knowledge, and exploring opportunities for collaboration. Feel free to reach out to me here on LinkedIn or via email - s••••••••@gmail.com

Experience

  1. Gpu Logic Design Engineer

    英特尔

    May 2024 — Present · Santa Clara, CA, US

Education

  • Sri Jayachamarajendra College Of Engineering

    Electrical and Electronics Engineering

  • San Jose State University

    Master of Science - MS

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Sahanashree H N — Gpu Logic Design Engineer at 英特尔 in San Francisco, CA, US | Unifers