Sahana Barike

About Sahana Barike

Programming in C and RTL coding using Verilog - Well versed in FPGA design flow starting from Specification understanding Block level Design Integration of Design -> Synthesis and Design Implementation Realization of applications at System level - Integration of Hardware IPs - Test Bench development using Verilog - Implemented design on Virtex, Zynq and Cyclone V SoC FPGAs - Familiar with FPGA tools like Altera Quatus, Xilinx Vivado/ISE and Debugging tools like Chipscope - Architecture of and Zynq UltraScale+ MPSoC - Realizing applications on different kind of processors - Familiar with Xen Hypervisor and Xilinx’s SDSoC - Developing technical documents like SoC User Guides and Technical Reference Manuals - Video Codecs: MPEG-2 Encoder and MPEG-4, VC1, AVS, HEVC decoders - Effort estimation and managing a project - All the phases of software development life cycle - Xilinx Certified Engineer

Experience

1. Principal Fae

   Arm

   Nov 2021 — Present · Bengaluru, IN

Education

• Visvesvaraya Technological University

  Bachelor of Engineering - BE, Electrical, Electronics and Communications Engineering

• BGS Mysore

  Bachelor of Engineering (B.E.), Electronics and Communications Engineering, 72%