Anindya Saha

About Anindya Saha

Analog/Mixed-Signal circuit designer (DDG Special Circuits, Intel Corporation)- DDR4/5 memory I/O interface circuit design (LVR, Clocking, Sensing etc.)• PhD (2017) in Electrical Engineering, University of Minnesota, Twin Cities - Specialization on ADC/DAC (SAR, flash, pipeline, TDC), switched-capacitor circuits, amplifiers - Post-Silicon measurement experience in TSMC 40/65nm CMOS - Student team leader: DARPA CLASIC program (20••••16)• TCAS II, ISCAS, IET Electronic Letters reviewer • Hands-on lab experience including use of oscilloscopes, spectrum analyzer, logic analyzer, etc.• Expertise in Cadence, LVS/DRC, Matlab/Simulink, Altium, HSPICE, Synopsis tools, C, C++, Verilog • Rigorous academic background in RF/digital circuit design & wireless communications

Experience

1. Staff Analog Mixed-signal Circuit Design Engineer

   Intel

   Jun 2025 — Present · Hillsboro, OR, US

Education

• Comilla Cadet College

  S.S.C & H.S.C., Science

• University of Minnesota

  Ph.D., Electrical Engineering

  2012 — 2017

• Bangladesh University of Engineering and Technology

  B.Sc., Electrical and Electronic Engineering

• University of Minnesota

  MS, Electrical Engineering

  2012 — 2015

Skills

• Field-Programmable Gate Arrays (Fpga)
• Simulations
• Integrated Circuit Design
• Cmos
• Labview
• Algorithms
• Altium Designer
• Mixed-Signal Ic Design
• Vlsi
• C
• Latex
• Matlab
• Very-Large-Scale Integration (Vlsi)
• Signal Processing
• Simulink
• C++
• Analog Circuit Design
• Fpga
• Circuit Design
• Verilog
• Printed Circuit Board (Pcb) Design
• Cadence
• Synopsis Design Vision
• Ni Labview