Sagar Karia
Pre Si Verification Engineer at Intel
- Role
- Pre Silicon Verification Engineer at Intel
- Location
- Rajkot, GJ, IN
- LinkedIn followers
- 500 followers
About Sagar Karia
Overall having 11+ years of experience in ASIC Verification, methodology development…
Experience
Pre Silicon Verification Engineer
Feb 2022 — Present · Bengaluru, IN
Leading multiple protocol bridges verification from valplan to coverage closure. UCIe verification from scratch at Sub-system including creation of TB from scratch. Validation owner of Image Processing Unit(Camera for client) for Core ultra product (AI PC).
Education
Government Enginnering College
Bachelor of Engineering (B.E.)
2009 — 2013
Skills
- Arm
- Modelsim
- Rtl Verification
- Digital Electronics
- Vhdl
- Uvm
- C
- Debugging Code
- Xilinx
- Systemverilog
- Rtl Coding
- Functional Verification
- Verilog
- Perl
- Rtl Design
- Asic
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