Safina Rahman
Lead Engineer @ HCLTech | Post Silicon Validation | SOC EV board Design | Cadance | Bench characterization | Functional Validation | Hardware Test Automation | Python | SCPI
- Role
- Lead Engineer at HCLTech
- Location
- Chennai, TN, IN
- LinkedIn followers
- 500 followers
About Safina Rahman
Passionate hardware systems engineer experienced in SoC and analog/mixed-signal IC validation with strong expertise in board bring-up, power-on sequencing, and system-level functional and electrical compliance. Skilled in silicon characterization including transient analysis, PDN evaluation, signal integrity and performance validation across PVT conditions. Proficient in validating power architectures such as LDOs, DC-DC converters, and MOSFET drivers with focus on stability, noise, and dynamic response. Adept at EVB design using Cadence tools, covering schematic capture, component selection, and verification. Strong background in lab automation using Python (PyVISA) for instrument control, data acquisition, and analysis, improving validation efficiency. Proven ability to debug complex silicon and system-level issues and collaborate across design, test, and system teams, with comprehensive documentation supporting product readiness.
Experience
Lead Engineer
Jan 2026 — Present · Chennai, IN
Education
St. Joseph's College Of Engineering
Bachelor's Degree, Electrical, Electronics and Communications Engineering
2019 — 2023
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