Safdar Abbas
ASIC Design Engineer at Qualcomm
- Role
- Asic Design Engineer at Qualcomm
- Location
- Varanasi, UP, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Safdar Abbas
RTL Design Engineer with more than 2 years of experience in Protocol interfacing, RTL Designing, Verification and Validation. Worked on different ASIC/FPGA level Designing in verilog using tools like Vivado, ISE, Modelsim and Questasim. Also have knowledge of VHDL, SV, UVM, Linux and Shell scripting.
Experience
Asic Design Engineer
Sep 2021 — Present · Bengaluru, IN
Education
Centre for Development of Advanced Computing (C-DAC)
PG Diploma
2018 — 2019
ABES Engineering College
Bachelor of Technology - BTech
2013 — 2017
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