Sadaf Parwaiz
ASIC Physical Design | Texas Instruments | IIT Bombay
- Role
- Physical Design Engineer at Texas Instruments
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Sadaf Parwaiz
Areas of interest: Physical Design, Digital VLSI
Experience
Physical Design Engineer
Mar 2020 — Present · Bengaluru, IN
Logical Synthesis, LEC, CLP, STA, Timing ECO, Constraints Coding, Power Performance and Area OptimizationFloorplan, placement, CTS, postroute
Education
University of Mumbai
Bachelor of Engineering (B.E.), Electronics Engineering
2009 — 2013
Indian Institute of Technology, Bombay
Master of Technology, Microelectronics and VLSI
2015 — 2018
Maharashtra State Board
HSC, Science
2007 — 2009
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