Sachin Gugwad

Group Director of Design Engineering at Cadence Design Systems

Role
Design Engineering Group Director at Cadence
Location
San Jose, CA, US
LinkedIn followers
500 followers

About Sachin Gugwad

More than 17 years of experience in Memory interfaces. Keen on building high performance Team. Successfully led team focusing on next generation memory interfaces like DDR/LPDDR/GDDR.

Experience

  1. Design Engineering Group Director

    Cadence

    Jul 2025 — Present · San Jose, CA, US

Education

  • BVBCET

    Master of Technology (MTech), VLSI and Embedded System

    2007 — 2010

  • BVBCET

    B.E, Electronics and Communications

    2003 — 2007

Skills

  • Debugging
  • Nfc
  • Physical Design
  • Soc
  • Pcie
  • Asic
  • Cdrs
  • Equalization
  • Vlsi
  • Ddr3
  • Io Design
  • Mathematical Modeling
  • Verilog
  • Analog Circuit Design
  • Customer Service
  • Wlan
  • Adcs
  • Analog Circuits
  • Mixed Signal
  • Silicon Validation

Find verified contacts for anyone on LinkedIn

Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.

Free plan included · No credit card required

This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.

Sachin Gugwad — Design Engineering Group Director at Cadence in San Jose, CA, US | Unifers