Saad Z.
Director of Engineering @Arteris
Austin, TX, US
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MOBILE NUMBERS
+91 *********19
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WORK HISTORY
Jan 2017 — Present
Director of Engineering @Arteris
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SKILLS
Traffic ManagersVhdlTclOvmOpen Verification MethodologyDftTransaction / Cycle Accurate Models in Sv / C / C++EdaRtl CodingSystemcSystem on a Chip (Soc)Embedded SystemsSocFunctional VerificationComputer ArchitectureModelsimIntegrated Circuit DesignSystemverilogUvmPliAsicNetwork ProcessorsLeadershipVmmVerificationRegression TestingVerilogFunctional CoverageDebuggingCode Verification Environments From ScratchVerification Planning and Execution From Testplan to Sign-OffDevice DriversC++SemiconductorsCode CoverageField-Programmable Gate Arrays (Fpga)Rtl DesignPerl ScriptFpgaSimulations
ABOUT SAAD Z.
Accomplished Verification Engineer with experience in Interconnects, NoC, Caches (L1 & …
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