Saad Z.
- Role
- Director of Engineering at Arteris
- Location
- Austin, TX, US
- LinkedIn followers
- 500 followers
About Saad Z.
Accomplished Verification Engineer with experience in Interconnects, NoC, Caches (L1 & …
Experience
Director of Engineering
Jan 2017 — Present
Skills
- Traffic Managers
- Vhdl
- Tcl
- Ovm
- Open Verification Methodology
- Dft
- Transaction / Cycle Accurate Models in Sv / C / C++
- Eda
- Rtl Coding
- Systemc
- System on a Chip (Soc)
- Embedded Systems
- Soc
- Functional Verification
- Computer Architecture
- Modelsim
- Integrated Circuit Design
- Systemverilog
- Uvm
- Pli
- Asic
- Network Processors
- Leadership
- Vmm
- Verification
- Regression Testing
- Verilog
- Functional Coverage
- Debugging
- Code Verification Environments From Scratch
- Verification Planning and Execution From Testplan to Sign-Off
- Device Drivers
- C++
- Semiconductors
- Code Coverage
- Field-Programmable Gate Arrays (Fpga)
- Rtl Design
- Perl Script
- Fpga
- Simulations
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