Ryan Pavlick
CSTD Environmental Testing Lab Group Leader at Intel Corporation
- Role
- Cstd Environmental Testing Lab Group Leader at Intel
- Location
- Beaverton, OR, US
- LinkedIn followers
- 500 followers
About Ryan Pavlick
Currently work as the Filtration and Purification Technologist in Intel Global Supply Chain supporting our factories globally. I started in 2013 as an Intel wet etch process development engineer and have now 5+ years experience in semiconductor manufacturing. My main focus is benchmarking, evaluating, and developing wet chemical filtration/purification technologies for Intel\'s next generation semiconductor manufacturing.
Experience
Cstd Environmental Testing Lab Group Leader
Jun 2023 — Present
Education
The College of New Jersey
Bachelor of Science (B.S.), Chemistry, 3.572/4.0
2005 — 2009
Penn State University
Doctor of Philosophy (Ph.D.), Inorganic Chemistry, 3.9/4.0
2009 — 2013
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