Rushank M
Physical Design Engineer at Teesolve semiconductors
- Role
- Physical Design Engineer at Tessolve
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Rushank M
Strong comprehension of the ASIC design Flow. Good knowledge of VLSI Physical Design APR flowHands-on experience in Synopsys, STA Prime Time Shell.Hands-on experience in 40nm technology using Synopsys ICC2 tool for Block Level implementation.Comprehensive knowledge of Physical Flow stages like Floor Planning, IR Drop analysis, Place and Route, CTS, Timing Analysis, and DRC/LVS.Hands-on experience in EDA tool, Perl, and Unix/Linux environment.Familiar with Industry standard Fusion Compiler methodologies from Synopsys. Resolved many timing issues in various stages of the block implementationHands-on experience in resolving IR Drop, Congestion and issues related to the block level implementation of a chip
Experience
Physical Design Engineer
Jan 2024 — Present · Bengaluru, IN
Education
Lakireddy Bali Reddy College of Engineering(Autonomous)
Electronics and communication engineering , Electronics and communication engineering
RV VLSI Design Center
Graduate Physical design Engineer, Physical Design
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