Rushabh Chaugule
ASIC Physical Design Engineer
- Role
- Asic Physical Design Engineer at NVIDIA
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Rushabh Chaugule
Experienced Timing/Physical Design Engineer with a demonstrated history of working in the…
Experience
Asic Physical Design Engineer
Dec 2024 — Present
Education
Abasaheb Garware College, Pune, India.
Bachelor’s Degree
2011 — 2014
Department of Electronics, University of Pune
Master’s Degree
2014 — 2016
Skills
- Microcontrollers
- Orcad
- Physical Design
- Phoenix Opto Designer Software
- Plc Programming
- Xilinx Ise
- Formal Verification
- Cadence Virtuoso
- Team Leadership
- Leadership
- Matlab
- Static Timing Analysis
- Synopsys Tools
- Project Management
- C
- Logic Synthesis
- Strategic Planning
- Pspice
- Ni Labview
- Management
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